Sevilmiş F.Karaca H.2020-03-262020-03-2620200378-7796https://dx.doi.org/10.1016/j.epsr.2020.106303https://hdl.handle.net/20.500.12395/38638Recently, various phase locked loop (PLL) methods have been improved for a reliable and robust synchronization under non-ideal grid conditions. One of the PLLs is a hybrid PLL (HPLL) which is an improved structure of the quasi-type-1 PLL (QT1-PLL) method. In this paper, an enhanced HPLL that offers both fast transient response and increased disturbance rejection capability for dominant harmonics is proposed. The proposed PLL includes adaptive all-pass-filters (APFs) in pre-filtering stage to eliminate fundamental frequency negative sequence (FFNS) component. Thus, window-width of the moving average filter (MAF) is reduced by three times compared with the HPLL by means of removing the FFNS component. So, the proposed PLL, which is called fast-hybrid PLL (FH-PLL), considerably ensures a fast transient response. Also, in case of grid faults (for example, type-B, type-C, type-D, and etc.), at the same time frequency change occurs, the FH-PLL completely blocks the FFNS component by means of using adaptive DAPF. In this study, it is experimentally implemented HPLL, QT1-PLL, and the proposed FH-PLL methods. The effectiveness of the FH-PLL is verified owing to experimental results and comparison with the QT1-PLL and HPLL. © 2020 Elsevier B.V.en10.1016/j.epsr.2020.106303info:eu-repo/semantics/closedAccessAll-pass filterDistorted grid conditionsFH-PLLGrid tied inverterMoving average filter (MAF)PLLArticle184Q1WOS:000525770200022Q2