GA based selective harmonic elimination for multilevel inverter with reduced number of switches: an experimental study

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dc.contributor.authorBektas, Enes.
dc.contributor.authorKaraca, Hulusi.
dc.date.accessioned2020-03-26T20:14:22Z
dc.date.available2020-03-26T20:14:22Z
dc.date.issued2019
dc.departmentSelçuk Üniversitesi, Teknoloji Fakültesi, Elektrik-Elektronik Mühendisliği Bölümüen_US
dc.description.abstractIn power electronic applications, especially high power and medium voltage, multilevel inverters (MLIs) have been commonly used. MLIs ensure high quality load voltage and lower Total Harmonic Distortion (THD) than traditional inverter. In this paper, a multilevel inverter structure with reduced number of power switches is proposed. The proposed multilevel inverter is lower costed than conventional MLL Also, a Genetic Algorithm (GA) based Selective Harmonic Elimination (SHE) technique has been used for the first time in the proposed MLI structure with reduced number of switches. The proposed GA based SHE technique computes the optimum switching angles by solving nonlinear harmonic equations of multilevel inverter. Both Isochronous switching (IS) and SHE techniques have been applied to proposed MLI to demonstrate the effectiveness of the GA based SHE technique. Simulation and experimental results for 7, 11 and 13-level have been obtained. Results of 11-level inverter is analysed and given in detail. Results have clearly proved that desired order harmonics in proposed MLI topology can be eliminated by using GA based SHE technique and lower THD on the load voltage has been provided.en_US
dc.description.sponsorshipScientific Research Project Coordinating Office of Selcuk University (SUBAP)en_US
dc.description.sponsorshipThis research was funded by the Scientific Research Project Coordinating Office of Selcuk University (SUBAP).en_US
dc.identifier.citationBektas, E., Karaca, H. (2019). GA Based Selective Harmonic Elimination for Multilevel Inverter with Reduced Number of Switches: An Experimental Study. Elektronika ir Elektrotechnika, 25(3), 10-17.
dc.identifier.doi10.5755/j01.eie.25.3.23670en_US
dc.identifier.endpage17en_US
dc.identifier.issn1392-1215en_US
dc.identifier.issue3en_US
dc.identifier.scopusqualityQ3en_US
dc.identifier.startpage10en_US
dc.identifier.urihttps://dx.doi.org/10.5755/j01.eie.25.3.23670
dc.identifier.urihttps://hdl.handle.net/20.500.12395/37868
dc.identifier.volume25en_US
dc.identifier.wosWOS:000473125300002en_US
dc.identifier.wosqualityQ4en_US
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.institutionauthorKaraca, Hulusi.
dc.language.isoenen_US
dc.publisherKAUNAS UNIV TECHNOLOGYen_US
dc.relation.ispartofELEKTRONIKA IR ELEKTROTECHNIKAen_US
dc.relation.publicationcategoryMakale - Uluslararası Hakemli Dergi - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/openAccessen_US
dc.selcuk20240510_oaigen_US
dc.subjectGenetic algorithmen_US
dc.subjectMultilevel inverteren_US
dc.subjectReduced number of switchesen_US
dc.subjectSelective harmonic eliminationen_US
dc.subjectTotal harmonic distortionen_US
dc.titleGA based selective harmonic elimination for multilevel inverter with reduced number of switches: an experimental studyen_US
dc.typeArticleen_US

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