An Ilp Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors

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dc.contributor.authorTosun, Süleyman
dc.contributor.authorMansouri, Nazanin
dc.contributor.authorKandemir, Mahmut
dc.contributor.authorÖztürk, Özcan
dc.date.accessioned2020-03-26T17:03:02Z
dc.date.available2020-03-26T17:03:02Z
dc.date.issued2006
dc.departmentSelçuk Üniversitesien_US
dc.description21st International Symposium on Computer and Information Sciences (ISCIS 2006) -- NOV 01-03, 2006 -- Istanbul, TURKEYen_US
dc.description.abstractOne of the main difficuties to map an embedded application onto a multiprocessor architecture is that there are multiple ways of this mapping due to several constraints. In this paper, we present an Integer Linear Programming based framework that maps a given application (represented as a task graph) onto a Heterogeneous Chip Multiprocessor architecture. Our framework can be used with several objective functions such as energy, performance, and fallibility (opposite of reliability). We use Dynamic Voltage Scaling (DVS) for reducing energy consumption while we employ task duplication to minimize fallibility. Our experimental results show that over 50% improvements on energy consumption are possible by using DVS, and the fully task duplicated can be achieved under tight performance and energy bounds.en_US
dc.description.sponsorshipSabanci Univ, Fac Engn & Nat Sci, Sci & Technol Res Council Turkey, Sabanci Univ, Inst Elect & Elect Engineers, Turkey Sect, IFIPen_US
dc.identifier.citationÖztürk, Ö., Kandemir, M., Mansouri, N., Tosun, S., (2006). An Ilp Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors. Computer and Information Sciences - Iscis 2006, Proceedings, (4263), 267-276.
dc.identifier.endpage276en_US
dc.identifier.isbn3-540-47242-8
dc.identifier.issn0302-9743en_US
dc.identifier.issn1611-3349en_US
dc.identifier.scopusqualityQ3en_US
dc.identifier.startpage267en_US
dc.identifier.urihttps://hdl.handle.net/20.500.12395/20321
dc.identifier.volume4263en_US
dc.identifier.wosWOS:000243130100030en_US
dc.identifier.wosqualityN/Aen_US
dc.indekslendigikaynakWeb of Scienceen_US
dc.indekslendigikaynakScopusen_US
dc.institutionauthorTosun, Süleyman
dc.language.isoenen_US
dc.publisherSpringer-Verlag Berlinen_US
dc.relation.ispartofComputer and Information Sciences - Iscis 2006, Proceedingsen_US
dc.relation.ispartofseriesLecture Notes in Computer Science
dc.relation.publicationcategoryKonferans Öğesi - Uluslararası - Kurum Öğretim Elemanıen_US
dc.rightsinfo:eu-repo/semantics/openAccessen_US
dc.selcuk20240510_oaigen_US
dc.subjectreliabilityen_US
dc.subjectduplicationen_US
dc.subjectenergy minimizationen_US
dc.subjectDVSen_US
dc.subjectHeterogeneous Chip Multiprocessorsen_US
dc.titleAn Ilp Formulation for Task Scheduling on Heterogeneous Chip Multiprocessorsen_US
dc.typeConference Objecten_US

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